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The PlayStation technical specifications〔http://problemkaputt.de/psx-spx.htm〕〔(【引用サイトリンク】 title=Everything You Have Always Wanted to Know about the Playstation But Were Afraid to Ask. )〕〔http://www.angelfire.com/electronic2/mariotan/〕〔http://videogamereview.tripod.com/psx/specs.html〕〔http://www.zophar.net/documents/psx.html〕〔http://www.absolute-playstation.com/api_faqs/faq7.htm〕〔http://psx.rules.org/psxrul2.shtml〕〔http://hitmen.c02.at/html/psx_docs.html〕 describe the various components of the PlayStation video game console. ==Central processing unit (CPU)== ; LSI LR333x0-based Core * MIPS R3000A-compatible 32-Bit RISC CPU with 5KB L1 cache, running at 33.8688 MHz . * The microprocessor is manufactured by LSI Logic Corp. with technology licensed from SGI. * Features: * * Operating performance: 30 MIPS * * Bus bandwidth 132 MB/s * * One Arithmetic/Logic unit (ALU) * CPU cache RAM: * * 4 kB instruction Cache〔 * * 1 kB non-associative SRAM data cache ; Geometry Transformation Engine (GTE or Cop2)〔 * Resides inside the main CPU processor, giving it additional vector math instructions used for 3D graphics - GTE performs high speed matrix multiplies * Operating performance: 66 MIPS * Polygons per second (Rendered in hardware): * * 90,000 with texture mapping, lighting and Gouraud shading〔http://www.gamepilgrimage.com/SATPScompare.htm〕 * * 180,000 with texture mapping〔http://www.stuff.tv/playstation/hall-fame-sony-playstation/feature〕 * * 360,000〔http://www.8-bitcentral.com/images/sony/playstation/boxBack.jpg〕 with flat shading ; Motion Decoder (MDEC) * Also residing within the main CPU, enables full screen, high quality FMV playback and is responsible for decompressing images and video into RAM. * Operating performance: 80 MIPS * Documented device mode is to read three RLE-encoded 16×16 macroblocks, run IDCT and assemble a single 16×16 RGB macroblock. * Output data may be transferred directly to GPU via DMA. * It is possible to overwrite IDCT matrix and some additional parameters, however MDEC internal instruction set was never documented. * Features: * * Compatible with MJPEG and H.261 files * * Directly connected to CPU bus ;System Control Coprocessor (Cop0)〔 *This unit is part of the CPU. Has 16 32-bit control registers. *Modified from the original R3000A cop0 architecture, with the addition of a few registers and functions. *Controls memory management, system interrupts, exception handling, and breakpoints. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「PlayStation technical specifications」の詳細全文を読む スポンサード リンク
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